On completion of the course, the student should be able to
based on a specification, make a pilot study that prepares the stages up to a completed design
master CAE development tools for schematic capture, PCB layout, FPGA- and SOPC-construction (where the understanding of different bus-protocols is important) to be able to implement a design
carry out tests with digital measuring instruments such as digital oscilloscopes and logic-analysers and evaluate the result.
Design tools: Altera Quartus II/Nios II and ModelSim för VHDL and SOPC development with FPGA's. Altium Designer for schema and PCB-layout or compatible tool. Projects: Discussed with the course leaders and can encompass a broad field but should be relevant and industry-related (e g a comparison of the energy consumption between multi-processor kernals and so called reconfigurable units), digital signal processing with advanced filters (e g to put together a so called software defined radio), robotics etc. Dependant on how many wants follow the course a specialisation can be made within the project but an understanding of the full design flow is vital for all participants.
Laboratory work around schematic capture and PCB-layout for those who have not already done this previously. SOPC-construction and supervision during the project work carried out as a group.
Project with written report.
The number of course participant is restricted to 8 people per course period. Grade selections on qualifying courses.
The reading list is missing. For further information, please contact the responsible department.