Syllabus for Accelerating Systems with Programmable Logic Components

Accelerering av system med programmerbara logikenheter

  • 10 credits
  • Course code: 1DT109
  • Education cycle: Second cycle
  • Main field(s) of study and in-depth level: Computer Science A1N, Technology A1N, Embedded Systems A1N

    Explanation of codes

    The code indicates the education cycle and in-depth level of the course in relation to other courses within the same main field of study according to the requirements for general degrees:

    First cycle
    G1N: has only upper-secondary level entry requirements
    G1F: has less than 60 credits in first-cycle course/s as entry requirements
    G1E: contains specially designed degree project for Higher Education Diploma
    G2F: has at least 60 credits in first-cycle course/s as entry requirements
    G2E: has at least 60 credits in first-cycle course/s as entry requirements, contains degree project for Bachelor of Arts/Bachelor of Science
    GXX: in-depth level of the course cannot be classified.

    Second cycle
    A1N: has only first-cycle course/s as entry requirements
    A1F: has second-cycle course/s as entry requirements
    A1E: contains degree project for Master of Arts/Master of Science (60 credits)
    A2E: contains degree project for Master of Arts/Master of Science (120 credits)
    AXX: in-depth level of the course cannot be classified.

  • Grading system: Fail (U), Pass (3), Pass with credit (4), Pass with distinction (5)
  • Established: 2016-05-17
  • Established by:
  • Revised: 2018-08-30
  • Revised by: The Faculty Board of Science and Technology
  • Applies from: week 24, 2019
  • Entry requirements: 120 credits including Computer Architecture, a basic course in digital circuits (especially state machines) and a basic course in programming.
    English language proficiency that corresponds to English studies at upper secondary (high school) level in Sweden ("English 6").
  • Responsible department: Department of Information Technology

Learning outcomes

On completion of the course, the student should be able to:

  • define complex digital circuits using hardware description languages such as VHDL or Verilog
  • test, debug, and verify digital designs using test benches and simulation tools
  • integrate custom programmable logic components with processor-based systems
  • analyse power and performance of accelerating key system components
  • demonstrate how a processor interacts with an accelerator through software

Content

  • Syntax and semantics of hardware description languages, and their use to define digital systems.
  • Design and implementation of test benches and the use of simulation-based and on-chip debugging facilities for verifying system designs.
  • Parallelisation of key algorithms for higher throughput and lower latency.
  • Integration of hardware accelerators at the system- and software-levels.
  • Overview of different design styles and abstraction methods.
  • An extensive project in simulation and synthesis, designing a realistic accelerator for a system on chip processor system. 

Instruction

Lectures, labs, exercises, project.

Assessment

Exercises, project work with report and presentation. 
 
If there are special reasons for doing so, an examiner may make an exception from the method of assessment indicated and allow a student to be assessed by another method. An example of special reasons might be a certificate regarding special pedagogical support from the disability coordinator of the university.

Syllabus Revisions

Reading list

The reading list is missing. For further information, please contact the responsible department.