Syllabus for Accelerating Systems with Programmable Logic Components

Learning outcomes

On completion of the course, the student should be able to:

• define complex digital circuits using hardware description languages such as VHDL or Verilog
• test, debug, and verify digital designs using test benches and simulation tools
• integrate custom programmable logic components with processor-based systems
• analyse power and performance of accelerating key system components
• demonstrate how a processor interacts with an accelerator through software

Content

• Syntax and semantics of hardware description languages, and their use to define digital systems.
• Design and implementation of test benches and the use of simulation-based and on-chip debugging facilities for verifying system designs.
• Parallelisation of key algorithms for higher throughput and lower latency.
• Integration of hardware accelerators at the system- and software-levels.
• Overview of different design styles and abstraction methods.
• An extensive project in simulation and synthesis, designing a realistic accelerator for a system on chip processor system.

Instruction

Lectures, labs, exercises, project.

Assessment

Exercises, project work with report and presentation.

If there are special reasons for doing so, an examiner may make an exception from the method of assessment indicated and allow a student to be assessed by another method. An example of special reasons might be a certificate regarding special pedagogical support from the disability coordinator of the university.