Accelerating Systems with Programmable Logic Components, 10 credits

Academic year 2023/2024

  • Autumn 2023, 33%, Campus

    Start date: 28 August 2023

    End date: 14 January 2024

    Application deadline: 17 April 2023

    Application code: UU-11201 Application

    Language of instruction: English

    Location: Uppsala

    Selection: Higher education credits in science and engineering (maximum 240 credits)

    Registration: 28 July 2023 – 4 September 2023

Entry requirements: 120 credits including Computer Architecture, a basic course in digital circuits (especially state machines) and a basic course in programming. Proficiency in English equivalent to the Swedish upper secondary course English 6.


If you are not a citizen of a European Union (EU) or European Economic Area (EEA) country, or Switzerland, you are required to pay application or tuition fees. Formal exchange students will be exempted from tuition fees, as well as the application fee. Read more about fees.

Application fee: SEK 900

Tuition fee, first semester: SEK 24,167

Tuition fee, total: SEK 24,167

About the course

On completion of the course, you should be able to:

  • define complex digital circuits using hardware description languages such as VHDL or Verilog
  • test, debug, and verify digital designs using test benches and simulation tools
  • integrate custom programmable logic components with processor-based systems
  • analyse power and performance of accelerating key system components
  • demonstrate how a processor interacts with an accelerator through software


  • Syntax and semantics of hardware description languages, and their use to define digital systems.
  • Design and implementation of test benches and the use of simulation-based and on-chip debugging facilities for verifying system designs.
  • Parallelisation of key algorithms for higher throughput and lower latency.
  • Integration of hardware accelerators at the system- and software levels.
  • Overview of different design styles and abstraction methods.
  • An extensive project in simulation and synthesis, designing a realistic accelerator for a system-on-chip processor system.

More information


Department of Information Technology

hus 10, Lägerhyddsvägen 1

Box 337, 751 05 UPPSALA


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