Chang Hyun Park
Associate senior lecturer/Assistant Professor at Department of Information Technology; Division of Computer Systems
- Telephone:
- +46 18 471 29 73
- E-mail:
- chang.hyun.park@it.uu.se
- Visiting address:
- Hus 10, Regementsvägen 10
- Postal address:
- Box 337
751 05 UPPSALA
- Academic merits:
- Docent
- ORCID:
- 0000-0002-8250-8574
Short presentation
Chang Hyun Park did his masters and doctoral studies at KAIST, South Korea. Currently, he is an assistant professor at Uppsala University. His main line of research has been on virtual memory and address translation. He is also interested in the cache hierarch, memory systems including non-volatile memory and heterogeneous memory systems, virtualization technology, and high speed I/O devices. You can find more information about Chang Hyun on his website.
Publications
Recent publications
CoGraf: Fully Accelerating Graph Applications with Fine-Grained PIM
Part of Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, 2026
- DOI for CoGraf: Fully Accelerating Graph Applications with Fine-Grained PIM
- Download full text (pdf) of CoGraf: Fully Accelerating Graph Applications with Fine-Grained PIM
Hiding Page Fault Latencies in Graph Processing Applications that Cannot Fit in Memory
Part of 40th IEEE International Parallel & Distributed Processing Symposium (IPDPS) 2026, 2026
Accelerating Page Migrations in Operating Systems with Intel DSA
Part of IEEE Computer Architecture Letters, p. 37-40, 2025
- DOI for Accelerating Page Migrations in Operating Systems with Intel DSA
- Download full text (pdf) of Accelerating Page Migrations in Operating Systems with Intel DSA
Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving
Part of MICRO '25, p. 292-307, 2025
- DOI for Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving
- Download full text (pdf) of Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving
Part of The International Symposium on Memory Systems (MEMSYS '23), p. 1-11, 2023
- DOI for Large-scale Graph Processing on Commodity Systems: Understanding and Mitigating the Impact of Swapping
- Download full text (pdf) of Large-scale Graph Processing on Commodity Systems: Understanding and Mitigating the Impact of Swapping
All publications
Articles in journal
Accelerating Page Migrations in Operating Systems with Intel DSA
Part of IEEE Computer Architecture Letters, p. 37-40, 2025
- DOI for Accelerating Page Migrations in Operating Systems with Intel DSA
- Download full text (pdf) of Accelerating Page Migrations in Operating Systems with Intel DSA
Exploring the Latency Sensitivity of Cache Replacement Policies
Part of IEEE Computer Architecture Letters, p. 93-96, 2023
- DOI for Exploring the Latency Sensitivity of Cache Replacement Policies
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A Reusable Characterization of the Memory System Behavior of SPEC2017 and SPEC2006
Part of ACM Transactions on Architecture and Code Optimization (TACO), 2021
Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds
Part of IEEE Transactions on Parallel and Distributed Systems, p. 2453-2465, 2020
Conference papers
CoGraf: Fully Accelerating Graph Applications with Fine-Grained PIM
Part of Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, 2026
- DOI for CoGraf: Fully Accelerating Graph Applications with Fine-Grained PIM
- Download full text (pdf) of CoGraf: Fully Accelerating Graph Applications with Fine-Grained PIM
Hiding Page Fault Latencies in Graph Processing Applications that Cannot Fit in Memory
Part of 40th IEEE International Parallel & Distributed Processing Symposium (IPDPS) 2026, 2026
Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving
Part of MICRO '25, p. 292-307, 2025
- DOI for Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving
- Download full text (pdf) of Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving
Part of The International Symposium on Memory Systems (MEMSYS '23), p. 1-11, 2023
- DOI for Large-scale Graph Processing on Commodity Systems: Understanding and Mitigating the Impact of Swapping
- Download full text (pdf) of Large-scale Graph Processing on Commodity Systems: Understanding and Mitigating the Impact of Swapping
Protean: Resource-efficient Instruction Prefetching
Part of The International Symposium on Memory Systems (MEMSYS '23), p. 1-13, 2023
- DOI for Protean: Resource-efficient Instruction Prefetching
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Every Walk's a Hit: Making Page Walks Single-Access Cache Hits
Part of Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS ’22), February 28 – March 4, 2022, Lausanne, Switzerland, 2022
- DOI for Every Walk's a Hit: Making Page Walks Single-Access Cache Hits
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Supporting Dynamic Translation Granularity for Hybrid Memory Systems
Part of 2022 IEEE 40th International Conference on Computer Design (ICCD), p. 25-32, 2022
Architecturally-independent and time-based characterization of SPEC CPU 2017
Part of 2020 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), p. 107-109, 2020
- DOI for Architecturally-independent and time-based characterization of SPEC CPU 2017
- Download full text 1 (pdf) of Architecturally-independent and time-based characterization of SPEC CPU 2017
- Download full text 2 (pdf) of Architecturally-independent and time-based characterization of SPEC CPU 2017
Perforated Page: Supporting Fragmented Memory Allocation for Large Pages
Part of Proceedings of the 47th Annual ACM/IEEE International Symposium on Computer Architecture (ISCA), p. 913-925, 2020
- DOI for Perforated Page: Supporting Fragmented Memory Allocation for Large Pages
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Decoupled Address Translation for Heterogeneous Memory Systems
Part of PACT '20, p. 155-156, 2020