Accelerating Systems with Programmable Logic Components
Syllabus, Master's level, 1DT109
- Education cycle
- Second cycle
- Main field(s) of study and in-depth level
- Computer Science A1N, Embedded Systems A1N, Technology A1N
- Grading system
- Fail (U), Pass (3), Pass with credit (4), Pass with distinction (5)
- Finalised by
- The Faculty Board of Science and Technology, 17 May 2016
- Responsible department
- Department of Information Technology
120 credits including Computer Architecture, a basic course in digital circuits (especially state machines) and a basic course in programming.
On completion of the course, the student should be able to:
- define complex digital circuits using hardware description languages such as VHDL or Verilog
- test, debug, and verify digital designs using test benches and simulation tools
- integrate custom programmable logic components with processor-based systems
- analyse power and performance of accelerating key system components
- demonstrate how a processor interacts with an accelerator through software
- Syntax and semantics of hardware description languages, and their use to define digital systems.
- Design and implementation of test benches and the use of simulation-based and on-chip debugging facilities for verifying system designs.
- Parallelisation of key algorithms for higher throughput and lower latency.
- Integration of hardware accelerators at the system- and software-levels.
- Overview of different design styles and abstraction methods.
- An extensive project in simulation and synthesis, designing a realistic accelerator for a system on chip processor system.
Lectures, labs, exercises, project.
Exercises, project work with report and presentation
No reading list found.